Dr. Bane Vasic is a Professor of Electrical and Computer Engineering and Mathematics at the University of Arizona. He is affiliated with BIO5, the Institute for Collaborative Beoresearch, and is a Director of the Error Correction Laboratory. Dr. Vasic is an inventor of the soft error-event decoding algorithm, and the key architect of a detector/decoder for Bell Labs magnetic recording read channel chips, which were regarded as the best in industry. Different variants of this algorithm were implemented in virtually all magnetic hard drives. His pioneering work on structured low-density parity check (LDPC) error correcting codes and invention of codes has enabled low-complexity iterative decoder implementations. Structured LDPC codes are today adopted in a number of communications standards, and are used in extremely high-density magnetic recording. Dr. Vasic is known for his theoretical work in error correction coding theory and codes on graphs, which has led to analytical characterization of the hard decision iterative decoders of low-density parity check (LDPC) codes, and design of codes with best error-floor performance known today.